Students are expected to learn basic concepts about implementing primary combinational/sequential logic circuits and explore behavioral modeling and simulation processes. Participants practice design work through elementary exercises and project work in small groups. The results of teamwork are required in the form of reports and presentations. A defense session is necessary to evaluate the performance of the student’s work.

1. Develop a fundamental understanding of digital circuits.
2. Gain hands-on experience in designing and implementing basic digital circuits using Verilog HDL.
3. Acquire proficiency in simulating and verifying digital designs using Verilog simulators.
4. Develop problem-solving skills through the analysis and debugging of circuit designs.
5. Familiarise students with the design process and workflow used in hardware design.

The supervising chair offers this module. The topics are selected based on their research and education preferences related to computer architecture and operating systems.
1. An overview of digital circuits and hardware design language - Verilog HDL, including syntax, modules, data types, operators, and control structures.
2. Introduction to combinational/sequential logic design, including flip-flops, registers, counters, procedural blocks, and state machines.
3. Introduction to the concept of test-benches for functional verification.
4. Hand-on skills in hardware design, simulation, and verification with industrial tools.